FPGA IIC HYGRO Tester Version 2 by Timothy Stotts
A small SoC project of Xilinx IPI-BD with Zynq-7000 subsystem CPU implementations for testing HDC1080 sensor readings of temperature and relative humidity. The design targets the Digilent Inc. Zybo-Z7-20 FPGA development board containing a Zynq-7000 APSoC. Three peripherals are used: Digilent Inc. Pmod HYGRO, Digilent Inc. Pmod CLS, Digilent Inc. Pmod SSD.
The folder HYGRO-Tester-Design-Zynq contains a Xilinx Vivado IP Integrator plus Xilinx SDK design. The first ARM A9 CPU is used to talk with board components, a temperature and relative humidity sensor, a 16x2 character LCD peripheral, and a two-digit Seven Segment Display. The FPGA peripherals are communicated with by an AXI subsystem design consisting of interconnects and memory mappings using the Xilinx Vivado IP Integrator Block Design.
A Xilinx SDK project contains the hand-off from Xilinx Vivado of the hardware design, and implements a very small Standalone program in C. From the Vivado hand-off, drivers for the peripherals and board components such as switches, buttons, LEDs, and compiled together with a Standalone C program in a total of 3 Xilinx SDK projects within a single workspace. (SDK must be run with the Vivado hand-off specified, and then the other two version-controlled projects imported into a workspace that is not version controlled.)
Target device assembly: Zybo-Z7-20 with Pmod HYGRO on test header, Pmod CLS on extension cable, Pmod SSD on extension cable
Target device execution: Zybo-Z7-20 with Pmod HYGRO on test header, Pmod CLS on extension cable, Pmod SSD on extension cable