FPGA IIC HYGRO Tester Version 1 by Timothy Stotts
A small SoPC project of Xilinx IPI-BD with Microblaze subsystem CPU implementations for testing HDC1080 sensor readings of temperature and relative humidity. The design targets the Digilent Inc. Arty-A7-100T FPGA development board containing a Artix-7 FPGA. Three peripherals are used: Digilent Inc. Pmod HYGRO, Digilent Inc. Pmod CLS, Digilent Inc. Pmod SSD.
The folder HYGRO-Tester-Design-AXI contains a Xilinx Vivado IP Integrator plus Xilinx SDK design. IP is instantiated in the Artix-7 FPGA to talk with board components, a HDC1080 temperature and relative humidity sensor, a 16x2 character LCD display, and a 2-digit 7-segment display. A Xilinx SDK project contains a very small Standalone program in C; drivers for the peripherals; and a main loop to process user input and display output.
Additionally, a pure Verilog-2001 design is contained in the folder HYGRO-Tester-Design-Verilog. This design implements equivalent user functionality as the SoPC, but with a pure HDL design that does not contain a soft CPU nor embedded executable authored in C. This design has an additional LED animation effect, but is otherwise equivalent in function.
Project information document:
Target device assembly: Arty-A7-100T with Pmod HYGRO on test header, Pmod CLS on extension cable, Pmod SSD on extension cable
Target device execution: Arty-A7-100T with Pmod HYGRO on test header, Pmod CLS on extension cable, Pmod SSD on extension cable