FPGA Colors Palette Tester Version 2 by Timothy Stotts
A small APSoC project of Xilinx IPI-BD with Zynq-7000 subsystem CPU implementations for testing 24-bit color palette mixing of discrete RGB LEDs versus 16-bit color palette mixing of a 96x64 OLEDrgb display’s text. The design targets the Digilent Inc. Zybo-Z7-20 FPGA development board containing a Xilinx Zynq-7000 APSoC. Two peripherals are used: Digilent Inc. Pmod KYPD, Digilent Inc. Pmod OLEDrgb.
The folder Color-Tester-Design-Zynq contains a Xilinx Vivado IP Integrator plus Xilinx SDK design. IP is instantiated in the Zynq-7000 FPGA fabric to talk with board components, a 4x4 alphanumeric keypad, and 96x64 pixel color display. A Xilinx SDK project contains a very small Standalone program in C; drivers for the peripherals; and a main loop to repeatedly read keypad entry and then update both discrete LEDs and display. The SDK project executes on the first hard ARM processor of the Zynq-7000 APSoC.
Project information document:
Target device assembly: Arty-A7-100T with Pmod KYPD, Pmod OLEDrgb, on extension cables
Target device execution example: Arty-A7-100T with Pmod KYPD, Pmod OLEDrgb, on extension cables