$ ./ghdl-run.sh run ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/NamePkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/OsvvmGlobalPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/VendorCovApiPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/TranscriptPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/TextUtilPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/AlertLogPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/MessagePkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/SortListPkg_int.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/RandomBasePkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/RandomPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/CoveragePkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/MemoryPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/ScoreboardGenericPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/ScoreboardPkg_slv.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/ScoreboardPkg_int.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/ResolutionPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/TbUtilPkg.vhd ghdl -a --std=08 --work=osvvm -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/osvvm/OsvvmContext.vhd ghdl -a --std=08 --work=OSVVM_Common -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/Common/src/StreamTransactionPkg.vhd ghdl -a --std=08 --work=OSVVM_Common -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/Common/src/AddressBusTransactionPkg.vhd ghdl -a --std=08 --work=OSVVM_Common -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/Common/src/AddressBusResponderTransactionPkg.vhd ghdl -a --std=08 --work=OSVVM_Common -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/Common/src/AddressBusVersionCompatibilityPkg.vhd ghdl -a --std=08 --work=OSVVM_Common -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/Common/src/ModelParametersPkg.vhd ghdl -a --std=08 --work=OSVVM_Common -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/Common/src/FifoFillPkg_slv.vhd ghdl -a --std=08 --work=OSVVM_Common -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/Common/src/OsvvmCommonContext.vhd ghdl -a --std=08 --work=osvvm_uart -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/UART/src/UartTbPkg.vhd ghdl -a --std=08 --work=osvvm_uart -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/UART/src/ScoreboardPkg_Uart.vhd ghdl -a --std=08 --work=osvvm_uart -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/UART/src/UartTxComponentPkg.vhd ghdl -a --std=08 --work=osvvm_uart -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/UART/src/UartRxComponentPkg.vhd ghdl -a --std=08 --work=osvvm_uart -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/UART/src/UartContext.vhd ghdl -a --std=08 --work=osvvm_uart -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/UART/src/UartTx.vhd ghdl -a --std=08 --work=osvvm_uart -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../OSVVM/OsvvmLibraries/UART/src/UartRx.vhd ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/clock_divider.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/clock_enable_divider.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/arty_reset_synchronizer.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/ext_interrupt_debouncer.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/lcd_text_functions_pkg.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/multi_input_debounce.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/one_shot_fsm.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/pulse_stretcher_synch.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/ssd_display.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/thresh_presets_selector.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/thresh_presets_pkg.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/acl_tester_fsm.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/adxl362_readings_to_ascii.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/lcd_text_feed.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/led_pwm_driver.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/led_palette_pulser.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/pmod_stand_spi_solo_pkg.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/pmod_generic_spi_solo.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/pmod_acl2_stand_spi_solo.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/pmod_cls_stand_spi_solo.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/pmod_acl2_custom_driver.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/pmod_cls_custom_driver.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/uart_tx_feed.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/uart_tx_only.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../RTL/fpga_serial_acl_tester_a7100.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/acl_testbench_pkg.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/clock_gen.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/board_ui.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/pmod_acl2.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/board_uart.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/pmod_cls.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/pmod_7sd.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/fpga_serial_acl_tester_testbench.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/fpga_serial_acl_tester_testharness.vhdl ghdl -a --std=08 --work=work -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 ../Testbench/test_default_fpga_regression.vhdl ghdl -e --std=08 -fsynopsys -frelaxed -O2 -Wc,-O2 -Wc,-march=znver3 -Wa,-march=znver3 -Wl,-march=znver3 -Wc,-mshstk -Wl,-mshstk -Wc,--param=l1-cache-line-size=64 -Wl,--param=l1-cache-line-size=64 -Wc,--param=l1-cache-size=32 -Wl,--param=l1-cache-size=32 -Wc,--param=l2-cache-size=512 -Wl,--param=l2-cache-size=512 test_default_fpga_regression ghdl -r --std=08 -fsynopsys -frelaxed test_default_fpga_regression ---vcd=test.vcd ---write-wave-opt=test.opt --stop-time=1us FPGA_SERIAL_ACL_TESTER_TESTBENCH starting simulation. Logging enabled for ALWAYS, INFO, PASSED. %% Log ALWAYS in u_tbc_clock_gen, Starting system clock emulation with period 10000000 fs. at 1 ns %% Log ALWAYS in u_tbc_board_ui, Starting board user interface emulation, 4 buttons, 4 switches, 4 RGB LEDs, 4 Basic LEDs. at 1 ns %% Log ALWAYS in u_tbc_pmod_acl2, Starting Pmod ACL2 emulation with SPI mode 0 bus, two interrupt lines, internal clock of 8.0 MHz. at 1 ns %% Log ALWAYS in u_tbc_pmod_cls, Starting Pmod CLS emulation with SPI mode 0 bus. at 1 ns %% Log ALWAYS in u_tbc_board_uart, Starting Board UART emulation at baud 115200. at 1 ns %% Log ALWAYS in u_tbc_pmod_7sd, Starting monitoring emulation of Pmod SSD (7SD). at 1 ns %% Log ALWAYS in u_tbc_pmod_cls, Entering Pmod CLS emulation with SPI mode 0 bus. at 2 ns %% Log ALWAYS in u_tbc_pmod_acl2, Entering Pmod ACL2 emulation of interrupt lines. at 2 ns %% Log ALWAYS in u_tbc_pmod_acl2, Entering Pmod ACL2 emulation of Data Ready filter control. at 2 ns %% Log ALWAYS in u_tbc_pmod_acl2, Updating Pmod ACL2 emulation of Data Ready filter control executing with period 2500000000000 fs . at 2 ns %% Log ALWAYS in u_tbc_pmod_acl2, Entering Pmod ACL2 emulation with SPI mode 0 bus. at 2 ns %% Log ALWAYS in u_tbc_board_ui, Entering emulation of switches 0,1,2,3 . at 2 ns %% Log INFO in u_tbc_board_ui, BOARD UI switches 0,1,2,3 unselected at startup. at 2 ns %% Log ALWAYS in u_tbc_board_ui, Entering emulation of buttons 0,1,2,3 . at 2 ns %% Log INFO in u_tbc_board_ui, BOARD UI buttons 0,1,2,3 released at startup. at 2 ns %% Log ALWAYS in u_tbc_clock_gen, Delaying external reset running with delay 1000000000 fs. at 2 ns %% Log ALWAYS in u_tbc_clock_gen, Entering external clock running with period 10000000 fs and 50% duty cycle. at 2 ns ./test_default_fpga_regression:info: simulation stopped by --stop-time @1us ghdl -r --std=08 -fsynopsys -frelaxed test_default_fpga_regression FPGA_SERIAL_ACL_TESTER_TESTBENCH starting simulation. Logging enabled for ALWAYS, INFO, PASSED. %% Log ALWAYS in u_tbc_clock_gen, Starting system clock emulation with period 10000000 fs. at 1 ns %% Log ALWAYS in u_tbc_board_ui, Starting board user interface emulation, 4 buttons, 4 switches, 4 RGB LEDs, 4 Basic LEDs. at 1 ns %% Log ALWAYS in u_tbc_pmod_acl2, Starting Pmod ACL2 emulation with SPI mode 0 bus, two interrupt lines, internal clock of 8.0 MHz. at 1 ns %% Log ALWAYS in u_tbc_pmod_cls, Starting Pmod CLS emulation with SPI mode 0 bus. at 1 ns %% Log ALWAYS in u_tbc_board_uart, Starting Board UART emulation at baud 115200. at 1 ns %% Log ALWAYS in u_tbc_pmod_7sd, Starting monitoring emulation of Pmod SSD (7SD). at 1 ns %% Log ALWAYS in u_tbc_pmod_cls, Entering Pmod CLS emulation with SPI mode 0 bus. at 2 ns %% Log ALWAYS in u_tbc_pmod_acl2, Entering Pmod ACL2 emulation of interrupt lines. at 2 ns %% Log ALWAYS in u_tbc_pmod_acl2, Entering Pmod ACL2 emulation of Data Ready filter control. at 2 ns %% Log ALWAYS in u_tbc_pmod_acl2, Updating Pmod ACL2 emulation of Data Ready filter control executing with period 2500000000000 fs . at 2 ns %% Log ALWAYS in u_tbc_pmod_acl2, Entering Pmod ACL2 emulation with SPI mode 0 bus. at 2 ns %% Log ALWAYS in u_tbc_board_ui, Entering emulation of switches 0,1,2,3 . at 2 ns %% Log INFO in u_tbc_board_ui, BOARD UI switches 0,1,2,3 unselected at startup. at 2 ns %% Log ALWAYS in u_tbc_board_ui, Entering emulation of buttons 0,1,2,3 . at 2 ns %% Log INFO in u_tbc_board_ui, BOARD UI buttons 0,1,2,3 released at startup. at 2 ns %% Log ALWAYS in u_tbc_clock_gen, Delaying external reset running with delay 1000000000 fs. at 2 ns %% Log ALWAYS in u_tbc_clock_gen, Entering external clock running with period 10000000 fs and 50% duty cycle. at 2 ns %% Log ALWAYS in u_tbc_clock_gen, Entering external reset running low with period 1000000000 fs. at 1002 ns %% Log INFO in u_tbc_board_ui, BASIC LED PWM 3 lasted for: L:1010000000 fs at 1022 ns %% Log INFO in u_tbc_board_ui, BASIC LED PWM 3 changed to: L:0 at 1022 ns %% Log INFO in u_tbc_board_ui, BASIC LED PWM 2 lasted for: L:1010000000 fs at 1022 ns %% Log INFO in u_tbc_board_ui, BASIC LED PWM 2 changed to: L:0 at 1022 ns %% Log INFO in u_tbc_board_ui, BASIC LED PWM 1 lasted for: L:1010000000 fs at 1022 ns %% Log INFO in u_tbc_board_ui, BASIC LED PWM 1 changed to: L:0 at 1022 ns %% Log INFO in u_tbc_board_ui, BASIC LED PWM 0 lasted for: L:1010000000 fs at 1022 ns %% Log INFO in u_tbc_board_ui, BASIC LED PWM 0 changed to: L:0 at 1022 ns %% Log INFO in u_tbc_board_ui, RGB LED PWM 0 lasted for: R:1010000000 fs G:1010000000 fs B:1010000000 fs at 1022 ns %% Log INFO in u_tbc_board_ui, RGB LED PWM 0 changed to: R:0 G:0 B:0 at 1022 ns %% Log INFO in u_tbc_board_ui, RGB LED PWM 1 lasted for: R:1010000000 fs G:1010000000 fs B:1010000000 fs at 1022 ns %% Log INFO in u_tbc_board_ui, RGB LED PWM 1 changed to: R:0 G:0 B:0 at 1022 ns %% Log INFO in u_tbc_board_ui, RGB LED PWM 2 lasted for: R:1010000000 fs G:1010000000 fs B:1010000000 fs at 1022 ns %% Log INFO in u_tbc_board_ui, RGB LED PWM 2 changed to: R:0 G:0 B:0 at 1022 ns %% Log INFO in u_tbc_board_ui, RGB LED PWM 3 lasted for: R:1010000000 fs G:1010000000 fs B:1010000000 fs at 1022 ns %% Log INFO in u_tbc_board_ui, RGB LED PWM 3 changed to: R:0 G:0 B:0 at 1022 ns %% Log INFO in u_tbc_pmod_7sd, 7SD Digit 0 is turned OFF: 0000000 at 6162 ns